With the increase of usefulness of resistance hybrids and various circuits incorporating resistance hybrids in the field of integrated analogue circuitry, precise resistance adjustment in the resistance hybrid without undue increase in hybrid circuit area is of great importance.
As illustrated in FIG. 5, for example, a constant voltage generating circuit 9 is provided to supply a stable power from DC power source 5 to load 7. The circuit 9 includes an input terminal (Vbat) 11, to which the DC power source 5 is connected, a reference voltage (Vref) generator 13, an operational amplifier 15, a P-channel MOS transistor 17 (which is hereinafter referred to as PMOS) to serve as an output driver, a voltage divider consisting of resistors, R1 and R2, and an output terminal (Vout) 19.
The operational amplifier 15 is incorporated into the constant voltage generating circuit 9 such that the output terminal of the amplifier 15 is connected to the gate of PMOS 17, the noninverting terminal thereof is input with the reference voltage, Vref, from the reference voltage generator 13, and the inverting terminal thereof is input with the output voltage (Vout) divided by the resistors, R1 and R2.
The constant voltage generating circuit 9 is therefore controlled to bring the voltage divided by the resistors, R1 and R2, to be equal to the reference voltage, Vref.
FIG. 6 is an electrical schematic diagram illustrating a voltage detection circuit.
Referring to FIG. 6, an operational amplifier 15 is incorporated into the voltage detection circuit 21 so as for the inverting terminal of the amplifier 15 to be input with a reference voltage, Vref, from reference voltage generator 13. The voltage, Vsens, which is input to an input terminal 23 to be measured presently, is divided by the resistors, R1 and R2. The thus divided voltage is then input to the noninverting terminal of the amplifier 15. In addition, the output of the amplifier 15 is then sent to exterior by way of an output terminal 25.
The voltage detection circuit 21 is therefore operated such that the output level of the amplifier 15 remains H, if the above noted voltage, Vsens, is high enough to bring the voltage divided by the resistors, R1 and R2, be higher than the reference voltage, Vref, while the output level turns to L, if the voltage, Vsens, decreases so as to bring the voltage divided by the resistors lower than the reference voltage.
In the constant voltage generating circuit of FIG. 5 and the voltage detection circuit of FIG. 6, there encountered in general is scattering of the reference voltage Vref, which is output by the reference voltage generator, that is considered primarily due to scattering of working parameters during manufacturing process steps.
This scattering is alleviated in practice by compensating by using a suitable device such as, for example, a resistance hybrid, the resistance value of which can be adjusted by disconnecting its component fuse element and thereby be able to suitably serve as a voltage divider having desirable resistance value.
Such a resistance hybrid has been disclosed in Japanese Laid-Open Patent Application No. 2000-15799 and illustrated in FIG. 7.
Referring to FIG. 7, the resistance hybrid includes an Rbottom resistance element, M+1 set resistance elements, SB0, SB1, . . . , SBm, with m being a positive integer, and an Rtop resistance element, which are connected in series. The set resistance elements, SB0, SB1, . . . , SBm, are respectively accompanied by corresponding fuse elements (or fuses), RL0, RL1, . . . , RLm, connected in parallel, thereby forming respective unit resistances.
In the above construction of the resistance hybrid, the accuracy of the resistance ratio of the set resistance element to the fuse is of considerable importance to determine accurately resultant resistance values of the resistance hybrid. These unit resistances connected in series are fabricated in practice being arranged in a ladder-type manner (FIG. 7).
The desirable value of the resistance can be obtained using the above structure after disconnecting arbitrary fuses which are properly selected among RL0, RL1, . . . , RLm, by irradiating laser beams.
For the adjustment of the hybrid resistance value, the error in resultant resistance following fuse disconnection can be reduced by forming beforehand the fuses, RL0, RL1, . . . , RLm, and the set resistance elements, RT0, RT1, . . . , RTm, so as for the fuses to have resistance values negligibly small compared with those of the set resistance elements (or for the set resistance elements to have resistance values large enough for those of the fuses to be taken negligibly small in comparison).
The resistance hybrid of FIG. 7 may be utilized as the voltage divider consisting of resistors, R1 and R2, included in the constant voltage generating circuit of FIG. 5, in which the end terminal of the resistance hybrid on the Rbottom side is grounded, the end terminal thereof on the Rtop side is connected to the drain of PMOS 17, the end terminal thereof on the Rtop side is connected to the drain of PMOS 17, and the junction terminal, Node L, which is formed between Rbottom and RT0, is connected to the noninverting terminal of operational amplifier 15.
The resistance hybrid of FIG. 7 may also be utilized as the voltage detection circuit illustrated in FIG. 6, in which the end terminal of the resistance hybrid on the Rbottom side is grounded (or earthed), the end terminal thereof on the Rtop side is connected to a terminal 23, and the junction terminal, Node L, is connected to the noninverting terminal of operational amplifier.
Therefore, the voltage dividing resistor R1 consists of Rtop, set resistance elements, RT0, RT1, . . . , RTm, and fuses, RL0, RL1, . . . , RLm, while the dividing resistor R2 consists of Rbottom.
In addition, the resistance hybrid of FIG. 7 may be utilized as the voltage divider consisting of resistors, R1 and R2, included in the constant voltage generating circuit of FIG. 5, in which the end terminal of the resistance hybrid on the Rbottom side is grounded, the end terminal thereof on the Rtop side is connected to the drain of PMOS 17, the end terminal thereof on the Rtop side is connected to the drain of PMOS 17, and the junction terminal, Node M, which is formed between Rbottom and RTm, is connected to the noninverting terminal of operational amplifier 15.
The resistance hybrid of FIG. 7 may also be utilized as the voltage detection circuit illustrated in FIG. 6, in which the end terminal of the resistance hybrid on the Rbottom side is grounded, the end terminal thereof on the Rtop side is connected to a terminal 23, and the junction terminal, Node M, is connected to the noninverting terminal of operational amplifier.
Therefore, the voltage dividing resistor, R1, consists of Rtop, while the dividing resistor, R2, consists of set resistance elements RT0, RT1, . . . , RTm, fuses, RL0, RL1, . . . , RLm, and Rbottom.
When the resistance value following fuse disconnection of the resistance hybrid of FIG. 7 is either relative small or close to that of the fuses, RL0, RL1, . . . , RLm, the effect on the hybrid resistance from the resistance of the fuses, RL0, RL1, . . . , RLm, cannot be neglected, and there arises a certain amount of error. This error may be alleviated by forming set resistance elements RT0, RT1, . . . , RTm, with some error components included therein beforehand.
In the resistance hybrid, in which higher accuracy in the resistance value is required for resistor pair (or unit resistor) consisting of the set resistance element and fuse, a resultant resistor component is fabricated in practice by connecting a plurality of the unit resistors either in series or in parallel.
As a result, the resistance value of the set resistance element is restricted to the resistance value, and the number of the unit resistor. Therefore, there has been encountered a drawback previously, in which the set resistance elements cannot necessarily be formed beforehand including therein the above mentioned error components.
In addition, if there is a certain error in the resistance hybrid of FIG. 7, this may give rise to another drawback for several circuits such as, for example, constant voltage generating circuit and voltage detection circuit, which utilize the resistance hybrid as a voltage divider. Namely, with such a resistance hybrid, neither desirable output voltages can be obtained for the constant voltage generating circuit, nor the voltage detection with respect to a precise level of voltage can be achieved.
As another method for reducing resistor error in such resistance hybrids, there may be cited a circuit having small resistance values of fuse elements as illustrated in FIG. 8.
Referring to FIG. 8, a plurality of fuses, RL0, RL1, . . . , RLm, are connected in parallel to each of the set resistance elements RT0, RT1, . . . , RTm, to thereby be able to reduce the resistance values for the fuses compared with those of the corresponding set resistance element. In this case, the fuse disconnection is carried out simultaneously for the entire set of the fuses which are connected to the same set resistance element.
In this method, however, a number of fuses have to be formed and connected in parallel. This gives rise to further drawbacks such as, for example, the increase in, the number of fuses to be connected, and the interval therebetween, and the concomitant increase in the fuse area which is required for securely carrying out the fuse disconnection. As a result, the area for forming such hybrid has to be larger than without parallel fuses.